{"config":{"lang":["en"],"separator":"[\\s\\-]+","pipeline":["stopWordFilter"]},"docs":[{"location":"","title":"RCO ALTERA FPGA \uc124\uacc4","text":"

RCO ALTERA FPGA IV KIT\ub97c \uc774\uc6a9\ud55c FPGA \uc2e4\uc2b5\uc744 \ud558\ub3c4\ub85d \uc9c0\uc6d0\ud55c\ub2e4.

"},{"location":"#fpga-core-module","title":"FPGA CORE MODULE","text":"J1 J2 \ud540\ubc88\ud638 \ud540\uc774\ub984 \ud540\ubc88\ud638 \ud540\uc774\ub984 \ud540\ubc88\ud638 \ud540\uc774\ub984 \ud540\ubc88\ud638 \ud540\uc774\ub984 1 GND 2 GND 1 GND 2 GND 3 +3.3V 4 +3.3V 3 +3.3V 4 +3.3V 5 PIN_R1 6 PIN_R2 5 PIN_AA11 6 PIN_AB11 7 PIN_P1 8 PIN_P2 7 PIN_AA13 8 PIN_AB13 9 PIN_N1 10 PIN_N2 9 PIN_AA14 10 PIN_AB14 11 PIN_M1 12 PIN_M2 11 PIN_AA15 12 PIN_AB15 13 PIN_J1 14 PIN_J2 13 PIN_AA16 14 PIN_AB16 15 PIN_H1 16 PIN_H2 15 PIN_AA17 16 PIN_AB17 17 PIN_F1 18 PIN_F2 17 PIN_AA18 18 PIN_AB18 19 PIN_E1 20 PIN_D2 19 PIN_AA19 20 PIN_AB19 21 PIN_C1 22 PIN_C2 21 PIN_AA20 22 PIN_AB20 23 PIN_B1 24 PIN_B2 23 PIN_Y22 24 PIN_Y21 25 - 26 - 25 PIN_W22 26 PIN_W21 27 PIN_B3 28 PIN_A3 27 PIN_V22 28 PIN_V21 29 PIN_B4 30 PIN_A4 29 PIN_U22 30 PIN_U21 31 PIN_C4 32 PIN_C3 31 PIN_R22 32 PIN_R21 33 PIN_B5 34 PIN_A5 33 PIN_P22 34 PIN_P21 35 PIN_B6 36 PIN_A6 35 PIN_N22 36 PIN_N21 37 PIN_B7 38 PIN_A7 37 PIN_M22 38 PIN_M21 39 PIN_B8 40 PIN_A8 39 PIN_L22 40 PIN_L21 41 PIN_B9 42 PIN_A9 41 PIN_K22 42 PIN_K21 43 PIN_B10 44 PIN_A10 43 PIN_J22 44 PIN_J21 45 PIN_B13 46 PIN_A13 45 PIN_H22 46 PIN_H21 47 PIN_B14 48 PIN_A14 47 PIN_F22 48 PIN_F21 49 PIN_B15 50 PIN_A15 49 PIN_E22 50 PIN_E21 51 PIN_B16 52 PIN_A16 51 PIN_D22 52 PIN_D21 53 PIN_B17 54 PIN_A17 53 PIN_C22 54 PIN_C21 55 PIN_B18 56 PIN_A18 55 PIN_B22 56 PIN_B21 57 PIN_B19 58 PIN_A19 57 PIN_N20 58 PIN_N19 59 PIN_B20 60 PIN_A20 59 PIN_M20 60 PIN_M19 61 GND 62 GND 61 GND 62 GND 63 VIN 64 VIN 63 VIN 64 VIN"},{"location":"#_1","title":"\uc8fc\uc694\uae30\ub2a5 \ud14c\uc2a4\ud2b8","text":""},{"location":"#_2","title":"\uae30\ucd08\uc2e4\uc2b5 \ud56d\ubaa9 \uc2e4\uc2b5","text":"
  1. LED ON/OFF:
  2. IN_OUT:
  3. CLK:
  4. 7SEG:
  5. KEY_7SEG:
  6. CLK_7SEG:
  7. MODE_SW:
"},{"location":"#_3","title":"\uc18c\ud615 \ub9c8\uc774\ucef4 \uc81c\uc791","text":"
  1. \ub9c8\uc774\ucef4\uc124\uacc4:
  2. cmd_set:
  3. \uc5b4\uc148\ube14\ub9ac\uc791\uc131:
  4. \ucef4\ud30c\uc77c\uacfc\uc791\uc131:
  5. \ub2e4\uc6b4\ub85c\ub4dc\uc791\uc131:
  6. FPGA\uc81c\uc791:
  7. \ud504\ub85c\uadf8\ub7a8\uc2e4\uc2b5:
"},{"location":"#matlabsimulink","title":"\ubaa8\ub378\uae30\ubc18\uc124\uacc4(MATLAB/SIMULINK)","text":"
  1. FPGA\ubaa8\ub378\uae30\ubc18\uc124\uacc4:
  2. \uae30\ub2a5\uc815\uc758:
  3. \uc2dc\ubbac\ub9c1\ud06c\uc791\uc131:
  4. VHDL\ucf54\ub4dc\uc0dd\uc131:
"},{"location":"simulink/1.%EB%AA%A8%EB%8D%B8%EA%B8%B0%EB%B0%98%EC%84%A4%EA%B3%84/","title":"FPGA \ubaa8\ub378\uae30\ubc18\uc124\uacc4","text":"

MATLAB/Simulink + HDL Coder\ub97c \uc0ac\uc6a9\ud558\uba74 \ube14\ub85d \ub2e4\uc774\uc5b4\uadf8\ub7a8\uc73c\ub85c \uc124\uacc4\ud55c \ud6c4 \uc790\ub3d9\uc73c\ub85c VHDL \ub610\ub294 Verilog \ucf54\ub4dc\ub97c \uc0dd\uc131\ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.

\uc774 \uacfc\uc815\uc744 \uc218\ud589\ud558\uc5ec, \ubaa8\ub378\uae30\ubc18 \uc124\uacc4\uc5d0 \ub300\ud55c \uc2e4\uc2b5\uc744 \uc9c4\ud589\ud55c\ub2e4.

\uc5ec\uae30\uc11c\ub294 \uac04\ub2e8\ud55c LED \uc81c\uc5b4\ub97c \uc704\ud55c \ubaa8\ub378 \uae30\ubc18 \uc124\uacc4\ub97c \uc804\uccb4 \uacfc\uc815\uc744 \uc218\ud589\ud558\uc5ec, \uc804\uccb4 \uc81c\uc791\uc5d0 \ub300\ud55c \uc774\ud574\ub97c \uc9c0\uc6d0\ud55c\ub2e4.

"},{"location":"simulink/1.%EB%AA%A8%EB%8D%B8%EA%B8%B0%EB%B0%98%EC%84%A4%EA%B3%84/#_1","title":"\uc8fc\uc694\ud750\ub984","text":"
Simulink \ubaa8\ub378 \uc791\uc131\n        \u2193\nHDL Coder \uc124\uc815\n        \u2193\n\uace0\uc815\uc18c\uc218\uc810(Fixed Point) \ubcc0\ud658\n        \u2193\nHDL Workflow Advisor \uc2e4\ud589\n        \u2193\nVHDL \uc0dd\uc131\n        \u2193\nQuartus/Vivado \ud569\uc131\n        \u2193\nFPGA \ub2e4\uc6b4\ub85c\ub4dc\n\n
"},{"location":"simulink/1.%EB%AA%A8%EB%8D%B8%EA%B8%B0%EB%B0%98%EC%84%A4%EA%B3%84/#_2","title":"\uc751\uc6a9 \uc608\uc81c","text":"

FPGA \uac1c\ubc1c\uc790\ub4e4\uc774 \uac00\uc7a5 \ub9ce\uc774 \uc0ac\uc6a9\ud558\ub294 \uc790\ub3d9 HDL \uc0dd\uc131 \uc608\uc81c\ub294 \ub2e4\uc74c\uacfc \uac19\uc740 \uac83\uc774 \uc788\ub2e4.

"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/","title":"\uae30\ub2a5\uc815\uc758","text":""},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#_2","title":"\ub3d9\uc791 \uc815\uc758","text":"

\ud0a4\ub97c \uc785\ub825\ud558\uba74 \ud574\ub2f9\ud558\ub294 \ub3d9\uc791\uc744 \ud558\ub3c4\ub85d \ud55c\ub2e4.

KEY \uc785\ub825 LED \ub3d9\uc791 KEY0 = 1 LED OFF KEY1 = 1 \ub290\ub9ac\uac8c \uae5c\ube61\uc784 KEY2 = 1 \ubcf4\ud1b5 \uc18d\ub3c4 KEY3 = 1 \ube60\ub974\uac8c \uae5c\ube61\uc784 \uc544\ubb34 KEY \uc5c6\uc74c \uc774\uc804 \uc0c1\ud0dc \uc720\uc9c0

\ud575\uc2ec\uc740 LED \uc0c1\ud0dc\ub97c \ubc14\ub85c \uacb0\uc815\ud558\ub294 \uac83\uc774 \uc544\ub2c8\ub77c, \ud604\uc7ac \ub3d9\uc791 \ubaa8\ub4dc\ub97c \ub808\uc9c0\uc2a4\ud130\uc5d0 \uc800\uc7a5\ud558\ub294 \uac83\uc785\ub2c8\ub2e4.

\nKEY \uc785\ub825\n   \u2193\n\ub3d9\uc791 \ubaa8\ub4dc \uc800\uc7a5 \ub808\uc9c0\uc2a4\ud130\n   \u2193\nBlink \uc18d\ub3c4 \uc120\ud0dd\n   \u2193\nCounter\n   \u2193\nLED \ucd9c\ub825\n\n

"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#_3","title":"\ubaa8\ub4dc\uac12 \uc815\uc758","text":"

\ubaa8\ub4dc\uc5d0 \ub530\ub978 \uc18d\ub3c4 \uc815\uc758

MODE_OFF    = 0\nMODE_SLOW   = 1\nMODE_NORMAL = 2\nMODE_FAST   = 3\n\n
"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#key","title":"KEY \ucc98\ub9ac \ub17c\ub9ac","text":"
if KEY0 = 1\n    mode = OFF\nelseif KEY1 = 1\n    mode = SLOW\nelseif KEY2 = 1\n    mode = NORMAL\nelseif KEY3 = 1\n    mode = FAST\nelse\n    mode = mode \uc720\uc9c0\nend\n
"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#simulink","title":"Simulink \ube14\ub85d \uad6c\uc131","text":"
KEY0 \u2500\u2510\nKEY1 \u2500\u2524\nKEY2 \u2500\u2524\u2192 Mode Select Logic \u2192 Unit Delay \u2192 mode\nKEY3 \u2500\u2518\n\nmode \u2192 Period Select \u2192 Counter \u2192 Compare \u2192 LED\n\n
"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#mtlab-block","title":"MTLAB BLOCK \uc791\uc131","text":"

\ud544\uc694\ud55c \ube14\ub85d\uc740 \uc9c1\uc811 MATLAB \ucf54\ub4dc \ube14\ub85d\uc73c\ub85c \uc791\uc131\ud558\uc5ec \ucd94\uac00\ud558\ub3c4\ub85d \ud55c\ub2e4.

\n+---------+\n| KEY[3:0]|\n+---------+\n     |\n     v\n+----------------+\n| MATLAB Function|\n| key_led_blink  |\n+----------------+\n     |\n     v\n+---------+\n|   LED   |\n+---------+\n\n
"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#simulink_1","title":"Simulink \uc785\ucd9c\ub825","text":"
\uc785\ub825:\nkey[4] : Boolean \ub610\ub294 uint8 \ubca1\ud130\n\n\ucd9c\ub825:\nled : Boolean\n
"},{"location":"simulink/2.%EA%B8%B0%EB%8A%A5%EC%A0%95%EC%9D%98/#vhdl","title":"VHDL \ucf54\ub4dc \uc0dd\uc131","text":"
entity key_led_blink is\nport(\n    clk   : in  std_logic;\n    reset : in  std_logic;\n    key   : in  std_logic_vector(3 downto 0);\n    led   : out std_logic\n);\nend entity;\n\n
"},{"location":"simulink/3.%EC%8B%9C%EB%AE%AC%EB%A7%81%ED%81%AC%EC%9E%91%EC%84%B1/","title":"\uc2dc\ubbac\ub9c1\ud06c\uc791\uc131","text":""},{"location":"simulink/3.%EC%8B%9C%EB%AE%AC%EB%A7%81%ED%81%AC%EC%9E%91%EC%84%B1/#_2","title":"\uae30\ubcf8\ube14\ub85d \uad6c\uc131","text":"

MATLAB FUNC \ube14\ub85d \ucf54\ub4dc\ub4e4 \ub2e4\uc74c\uacfc \uac19\uc774 \uc791\uc131\ud55c\ub2e4.

"},{"location":"simulink/3.%EC%8B%9C%EB%AE%AC%EB%A7%81%ED%81%AC%EC%9E%91%EC%84%B1/#matlab-fun","title":"MATLAB FUN \ube14\ub85d \uc791\uc131","text":"

MATLAB FUNC \ube14\ub85d\uc744 \ub354\ube14 \ud074\ub9ad\ub2e4\uc5ec \uc544\ub798 \ucf54\ub4dc\ub97c \uc791\uc131\ud55c\ub2e4.

function led = fcn(key0, key1, key2, key3)\n%#codegen\n\npersistent mode;\npersistent cnt;\npersistent led_state;\n\nif isempty(mode)\n    mode = uint8(0);       % 0 = OFF\nend\n\nif isempty(cnt)\n    cnt = uint32(0);\nend\n\nif isempty(led_state)\n    led_state = false;\nend\n\n% -----------------------------\n% 1. KEY \uc785\ub825\uc5d0 \ub530\ub77c \ubaa8\ub4dc \uc800\uc7a5\n% -----------------------------\nif key0\n    mode = uint8(0);       % OFF\nelseif key1\n    mode = uint8(1);       % SLOW\nelseif key2\n    mode = uint8(2);       % NORMAL\nelseif key3\n    mode = uint8(3);       % FAST\nend\n\n% -----------------------------\n% 2. \ubaa8\ub4dc\uc5d0 \ub530\ub77c \uae5c\ube61\uc784 \uc8fc\uae30 \uc120\ud0dd\n% 50MHz \ud074\ub7ed \uae30\uc900\n% -----------------------------\nperiod = uint32(0);\n\nif mode == uint8(0)\n    period = uint32(0);          % OFF\nelseif mode == uint8(1)\n    period = uint32(50000000);   % \ub290\ub9bc\nelseif mode == uint8(2)\n    period = uint32(25000000);   % \ubcf4\ud1b5\nelse\n    period = uint32(5000000);    % \ube60\ub984\nend\n\n% -----------------------------\n% 3. LED \ucd9c\ub825 \uc0dd\uc131\n% -----------------------------\nif mode == uint8(0)\n    led_state = false;\n    cnt = uint32(0);\nelse\n    if cnt >= period\n        cnt = uint32(0);\n        led_state = ~led_state;  % LED \ubc18\uc804\n    else\n        cnt = cnt + uint32(1);\n    end\nend\n\nled = led_state;\n\nend\n\n
"},{"location":"simulink/3.%EC%8B%9C%EB%AE%AC%EB%A7%81%ED%81%AC%EC%9E%91%EC%84%B1/#_3","title":"\ube14\ub85d\uc791\uc131\uc644\ub8cc","text":"

\uc120\uc73c\ub85c \uc5f0\uacb0\ud558\uc5ec, \ucd5c\uc885 \ube14\ub85d \uc791\uc131\uc744 \uc644\ub8cc\ud55c\ub2e4. Key \uc785\ub825\uc774 \ub418\ub3c4\ub85d \ube14\ub85d\uc744 \uadf8\ub824\uc900\ub2e4.

"},{"location":"simulink/4.VHDL%EC%BD%94%EB%93%9C/","title":"VHDL \ucf54\ub4dc","text":"

HDL Coder \uc744 \uc774\uc6a9\ud558\uc5ec VHDL \ucf54\ub4dc\ub97c \uc0dd\uc131\ud55c\ub2e4.

"},{"location":"simulink/4.VHDL%EC%BD%94%EB%93%9C/#_1","title":"\uc0dd\uc131\ub41c \ucf54\ub4dc","text":"
\nlibrary ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity led_blink is\n    port(\n        clk  : in  std_logic;\n        rst  : in  std_logic;\n\n        key0 : in  std_logic;\n        key1 : in  std_logic;\n        key2 : in  std_logic;\n        key3 : in  std_logic;\n\n        led  : out std_logic\n    );\nend entity;\n\narchitecture rtl of led_blink is\n\n    signal mode      : unsigned(1 downto 0) := \"00\";\n    signal cnt       : unsigned(31 downto 0) := (others=>'0');\n    signal period    : unsigned(31 downto 0);\n    signal led_state : std_logic := '0';\n\nbegin\n\n    ------------------------------------------------------------------\n    -- period \uacb0\uc815\n    ------------------------------------------------------------------\n    process(mode)\n    begin\n\n        case mode is\n\n            when \"00\" =>\n                period <= to_unsigned(0,32);\n\n            when \"01\" =>\n                period <= to_unsigned(50000000,32);\n\n            when \"10\" =>\n                period <= to_unsigned(25000000,32);\n\n            when others =>\n                period <= to_unsigned(5000000,32);\n\n        end case;\n\n    end process;\n\n    ------------------------------------------------------------------\n    -- \uba54\uc778 \uc0c1\ud0dc\uae30\uacc4\n    ------------------------------------------------------------------\n    process(clk,rst)\n    begin\n\n        if rst='1' then\n\n            mode      <= \"00\";\n            cnt       <= (others=>'0');\n            led_state <= '0';\n\n        elsif rising_edge(clk) then\n\n            ----------------------------------------------------------\n            -- mode \uc800\uc7a5\n            ----------------------------------------------------------\n            if key0='1' then\n                mode <= \"00\";\n\n            elsif key1='1' then\n                mode <= \"01\";\n\n            elsif key2='1' then\n                mode <= \"10\";\n\n            elsif key3='1' then\n                mode <= \"11\";\n            end if;\n\n            ----------------------------------------------------------\n            -- LED \uc0dd\uc131\n            ----------------------------------------------------------\n            if mode = \"00\" then\n\n                cnt       <= (others=>'0');\n                led_state <= '0';\n\n            else\n\n                if cnt >= period then\n\n                    cnt <= (others=>'0');\n\n                    led_state <= not led_state;\n\n                else\n\n                    cnt <= cnt + 1;\n\n                end if;\n\n            end if;\n\n        end if;\n\n    end process;\n\n    led <= led_state;\n\nend architecture;\n\n
"},{"location":"simulink/4.VHDL%EC%BD%94%EB%93%9C/#_2","title":"\ud540\ubc30\uce58","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_T2 clk PIN_E4 rst PIN_A3 key0 PIN_A5 key1 PIN_A6 key2 PIN_A20 key3 PIN_B3 led"},{"location":"simulink/4.VHDL%EC%BD%94%EB%93%9C/#_3","title":"\ud14c\uc2a4\ud2b8 \uc9c4\ud589","text":"

\ud574\ub2f9 \ucf54\ub4dc\ub97c Quartus \ub97c \uc774\uc6a9\ud558\uc5ec \ucef4\ud30c\uc77c \ud558\uace0, \ub3d9\uc791 \uacfc\uc815\uc744 \uc2e4\uc2b5\ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/1.LEDONOFF/","title":"LED ON OFF","text":"

\uc2e4\uc2b5\ud0a4\ud2b8\uc758 LED 16\ube44\ud2b8\ub97c ONOFF\ud558\ub294 \uacfc\uc815\uc744 \uc2e4\uc2b5\ub2c8\ub2e4.

\ud574\ub2f9 \uac12\uc5d0 \ub300\ud55c \ube44\ud2b8\uc5d0 LED \uac00 ON OFF\ub418\ub294\uc9c0 \ud655\uc778\ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/1.LEDONOFF/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_B3 LED_A[7] PIN_B4 LED_A[6] PIN_B5 LED_A[5] PIN_B6 LED_A[4] PIN_B7 LED_A[3] PIN_B8 LED_A[2] PIN_B9 LED_A[1] PIN_B10 LED_A[0] PIN_B13 LED_B[7] PIN_B14 LED_B[6] PIN_B15 LED_B[5] PIN_B16 LED_B[4] PIN_B17 LED_B[3] PIN_B18 LED_B[2] PIN_B19 LED_B[1] PIN_B20 LED_B[0]"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/1.LEDONOFF/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity led_test is\n   port(    LED_A   : out std_logic_vector(7 downto 0);\n                LED_B   : out std_logic_vector(7 downto 0) );\nend led_test;\n\n\narchitecture button_design of led_test is\nbegin\n\n    LED_A <= x\"F0\";\n    LED_B <= x\"0F\";\n\nend button_design;\n\n\n
"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/2.IN_OUT/","title":"IN_OUT","text":"

\uc2e4\uc2b5\ud0a4\ud2b8\uc758 LED 16\ube44\ud2b8\ub97c ONOFF\ud558\ub294 \uacfc\uc815\uc744 \uc2e4\uc2b5\ub2c8\ub2e4.

\ud574\ub2f9 \uac12\uc5d0 \ub300\ud55c \ube44\ud2b8\uc5d0 LED \uac00 ON OFF\ub418\ub294\uc9c0 \ud655\uc778\ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/2.IN_OUT/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_P21 din[7] PIN_N21 din[6] PIN_M21 din[5] PIN_L21 din[4] PIN_K21 din[3] PIN_J21 din[2] PIN_H21 din[1] PIN_F21 din[0] PIN_B3 dout[7] PIN_B4 dout[6] PIN_B5 dout[5] PIN_B6 dout[4] PIN_B7 dout[3] PIN_B8 dout[2] PIN_B9 dout[1] PIN_B10 dout[0]"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/2.IN_OUT/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity in_out is\n   port(\n      din  : in  std_logic_vector(7 downto 0);  -- 8\ube44\ud2b8 \uc785\ub825\n      dout : out std_logic_vector(7 downto 0)   -- 8\ube44\ud2b8 \ucd9c\ub825\n   );\nend entity;\n\narchitecture rtl of in_out is\nbegin\n\n   -- \uc785\ub825\uc744 \uadf8\ub300\ub85c \ucd9c\ub825\uc73c\ub85c \uc804\ub2ec\n   dout <= din;\n\nend architecture;\n\n\n
"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/3.CLK/","title":"CLK","text":"

\uc2e4\uc2b5\ud0a4\ud2b8\uc758 50MHz\uc758 \ud074\ub7ed\uc744 \ubc1b\uc544\uc11c \uc6d0\ud558\ub294 \uc2dc\uac04\uc73c\ub85c LED ON OFF \uacfc\uc815\uc744 \uc218\ud589\ud55c\ub2e4. \ucf54\uc5b4\ubaa8\ub4c8\uc5d0 \uc801\uc6a9\ub41c LED \uc640 CLK \uc624\uc2e4\ub808\uc774\ud130\uc758 \uc785\ub825\uc744 \uc0ac\uc6a9\ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/3.CLK/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_T2 clk PIN_E4 led"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/3.CLK/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
\n\nlibrary ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity clk is\n  port (\n    clk : in  std_logic;   -- PIN T2, 50MHz\n    led   : out std_logic    -- PIN E4 (active-high \uac00\uc815)\n  );\nend entity;\n\n\narchitecture rtl of clk is\n\n  signal cnt : integer range 0 to 49_999_999 := 0;\n  signal q   : std_logic := '0';\n\n  begin\n\n\n  process(clk)\n  begin\n    if rising_edge(clk) then\n      if cnt = 49_999_999 / 5 then\n        cnt <= 0;\n        q   <= not q;  -- 1\ucd08\ub9c8\ub2e4 \ud1a0\uae00 (ON 1\ucd08, OFF 1\ucd08)\n      else\n        cnt <= cnt + 1;\n      end if;\n    end if;\n  end process;\n\n\n  led <= q;            -- \ubcf4\ub4dc\uac00 active-low LED\ub77c\uba74: led0 <= not q;\n\nend architecture;\n\n\n\n\n\n
"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/4.7SEG/","title":"7SEG","text":"

\uc2e4\uc2b5\ud0a4\ud2b8\uc758 7SEGMENT\uc758 \ucd9c\ub825\uc774 \uc815\uc0c1\uc801\uc73c\ub85c \ub418\ub294\uc9c0 \ud655\uc778\ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/4.7SEG/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_AA13 led_out[0] PIN_AA14 led_out[1] PIN_AA15 led_out[2] PIN_AA16 led_out[3] PIN_AA17 led_out[4] PIN_AA18 led_out[5] PIN_AA19 led_out[6] PIN_AA20 led_out[7] PIN_AB14 seg[6] PIN_AB15 seg[5] PIN_AB16 seg[4] PIN_AB17 seg[3] PIN_AB18 seg[2] PIN_AB19 seg[1] PIN_AB20 seg[0]"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/4.7SEG/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity seg_out is\n   port(\n      seg     : out std_logic_vector(6 downto 0);   -- 7-\uc138\uadf8 \ucd9c\ub825 (g~a)\n      led_out : out std_logic_vector(0 to 7)        -- \uae30\uc874 \uc778\ub371\uc2a4(0 to 7)\n   );\nend seg_out;\n\narchitecture SegmentDecoder of seg_out is\n    signal key : integer range 0 to 15 := 5;  -- \ud45c\uc2dc\ud560 \uc22b\uc790 (0~15)\nbegin\n    ----------------------------------------------------------------\n    -- with-select: key \uac12 \u2192 seg \ud328\ud134 \ub9e4\ud551 (VHDL-93 \ud638\ud658)\n    ----------------------------------------------------------------\n    with key select\n        seg <=\n            \"100\" & \"0000\" when 0,   -- 0\n            \"111\" & \"1001\" when 1,   -- 1\n            \"010\" & \"0100\" when 2,   -- 2\n            \"011\" & \"0000\" when 3,   -- 3\n            \"001\" & \"1001\" when 4,   -- 4\n            \"001\" & \"0010\" when 5,   -- 5\n            \"000\" & \"0010\" when 6,   -- 6\n            \"111\" & \"1000\" when 7,   -- 7\n            \"000\" & \"0000\" when 8,   -- 8\n            \"001\" & \"0000\" when 9,   -- 9\n            \"000\" & \"1000\" when 10,  -- A\n            \"000\" & \"0011\" when 11,  -- b\n            \"100\" & \"0110\" when 12,  -- C\n            \"010\" & \"0001\" when 13,  -- d\n            \"000\" & \"0110\" when 14,  -- E\n            \"000\" & \"1110\" when 15,  -- F\n            \"111\" & \"1111\" when others;  -- blank\n\n    ----------------------------------------------------------------\n    -- LED \uac1c\ubcc4 \ube44\ud2b8 \uc124\uc815: \uae30\uc874 \ucf54\ub4dc \uadf8\ub300\ub85c \uc720\uc9c0\n    ----------------------------------------------------------------\n    led_out(7) <= '1';  -- LED 7\ubc88 ON\n    led_out(6) <= '1';\n    led_out(5) <= '1';\n    led_out(4) <= '0';  -- LED 4\ubc88 ON\n    led_out(3) <= '0';\n    led_out(2) <= '0';\n    led_out(1) <= '1';\n    led_out(0) <= '1';  -- LED 0\ubc88 ON\n\nend architecture;\n\n
"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/5.KEY_7SEG/","title":"KEY IN 7SEG","text":"

\uc2e4\uc2b5\ud0a4\ud2b8\uc758 \ud0a4\uc758 \uc785\ub825\uc744 \ubc1b\uc544, 7SEGMENT\uc73c\ub85c \ucd9c\ub825, \ucd9c\ub825\uc774 \uc815\uc0c1\uc801\uc73c\ub85c \ub418\ub294\uc9c0 \ud655\uc778\ud55c\ub2e4.

Keypad 7-Segment"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/5.KEY_7SEG/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_AA13 led_out[0] PIN_AA14 led_out[1] PIN_AA15 led_out[2] PIN_AA16 led_out[3] PIN_AA17 led_out[4] PIN_AA18 led_out[5] PIN_AA19 led_out[6] PIN_AA20 led_out[7] PIN_AB14 seg[6] PIN_AB15 seg[5] PIN_AB16 seg[4] PIN_AB17 seg[3] PIN_AB18 seg[2] PIN_AB19 seg[1] PIN_AB20 seg[0]"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/5.KEY_7SEG/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity seg_out is\n   port(\n      seg     : out std_logic_vector(6 downto 0);   -- 7-\uc138\uadf8 \ucd9c\ub825 (g~a)\n      led_out : out std_logic_vector(0 to 7)        -- \uae30\uc874 \uc778\ub371\uc2a4(0 to 7)\n   );\nend seg_out;\n\narchitecture SegmentDecoder of seg_out is\n    signal key : integer range 0 to 15 := 5;  -- \ud45c\uc2dc\ud560 \uc22b\uc790 (0~15)\nbegin\n    ----------------------------------------------------------------\n    -- with-select: key \uac12 \u2192 seg \ud328\ud134 \ub9e4\ud551 (VHDL-93 \ud638\ud658)\n    ----------------------------------------------------------------\n    with key select\n        seg <=\n            \"100\" & \"0000\" when 0,   -- 0\n            \"111\" & \"1001\" when 1,   -- 1\n            \"010\" & \"0100\" when 2,   -- 2\n            \"011\" & \"0000\" when 3,   -- 3\n            \"001\" & \"1001\" when 4,   -- 4\n            \"001\" & \"0010\" when 5,   -- 5\n            \"000\" & \"0010\" when 6,   -- 6\n            \"111\" & \"1000\" when 7,   -- 7\n            \"000\" & \"0000\" when 8,   -- 8\n            \"001\" & \"0000\" when 9,   -- 9\n            \"000\" & \"1000\" when 10,  -- A\n            \"000\" & \"0011\" when 11,  -- b\n            \"100\" & \"0110\" when 12,  -- C\n            \"010\" & \"0001\" when 13,  -- d\n            \"000\" & \"0110\" when 14,  -- E\n            \"000\" & \"1110\" when 15,  -- F\n            \"111\" & \"1111\" when others;  -- blank\n\n    ----------------------------------------------------------------\n    -- LED \uac1c\ubcc4 \ube44\ud2b8 \uc124\uc815: \uae30\uc874 \ucf54\ub4dc \uadf8\ub300\ub85c \uc720\uc9c0\n    ----------------------------------------------------------------\n    led_out(7) <= '1';  -- LED 7\ubc88 ON\n    led_out(6) <= '1';\n    led_out(5) <= '1';\n    led_out(4) <= '0';  -- LED 4\ubc88 ON\n    led_out(3) <= '0';\n    led_out(2) <= '0';\n    led_out(1) <= '1';\n    led_out(0) <= '1';  -- LED 0\ubc88 ON\n\nend architecture;\n\n
"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/6.CLK_7SEG/","title":"CLK AT 7SEG","text":"

CLK\uc744 \uc785\ub825\ubc1b\uc544. 7SEGMENT \uac12\ub4e4\uc774 \uc99d\uac00\ub418\uc5b4 \ucd9c\ub825\ub418\ub3c4\ub85d \ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/6.CLK_7SEG/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_AA13 led_out[0] PIN_AA14 led_out[1] PIN_AA15 led_out[2] PIN_AA16 led_out[3] PIN_AA17 led_out[4] PIN_AA18 led_out[5] PIN_AA19 led_out[6] PIN_AA20 led_out[7] PIN_AB14 seg[6] PIN_AB15 seg[5] PIN_AB16 seg[4] PIN_AB17 seg[3] PIN_AB18 seg[2] PIN_AB19 seg[1] PIN_AB20 seg[0] PIN_T2 clk"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/6.CLK_7SEG/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
\nlibrary ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;   -- \uc815\uc218\ud615 \uc5f0\uc0b0\uc6a9\n\nentity seg_clk is\n   port(\n      clk     : in  std_logic;                  -- 50MHz \ud074\ub7ed \uc785\ub825\n      led_out : out std_logic_vector(0 to 7);   -- LED \ucd9c\ub825\n      seg     : out std_logic_vector(6 downto 0) -- 7\uc138\uadf8 \ucd9c\ub825\n   );\nend entity;\n\narchitecture rtl of seg_clk is\n   ----------------------------------------------------------------\n   -- \uc2e0\ud638 \uc120\uc5b8\n   ----------------------------------------------------------------\n   signal cnt      : unsigned(25 downto 0) := (others => '0');  -- 50MHz \u2192 1Hz \ubd84\uc8fc\uc6a9\n   signal sec_tick : std_logic := '0';                          -- 1\ucd08 \ud384\uc2a4\n   signal num      : unsigned(3 downto 0) := (others => '0');   -- 0~15 \uce74\uc6b4\ud2b8\nbegin\n   ----------------------------------------------------------------\n   -- 50MHz \u2192 1Hz \ubd84\uc8fc\uae30 (1\ucd08\ub9c8\ub2e4 sec_tick='1')\n   ----------------------------------------------------------------\n   process(clk)\n   begin\n      if rising_edge(clk) then\n         if cnt = 49_999_999 then   -- 50,000,000 - 1\n            cnt <= (others => '0');\n            sec_tick <= '1';\n         else\n            cnt <= cnt + 1;\n            sec_tick <= '0';\n         end if;\n      end if;\n   end process;\n\n   ----------------------------------------------------------------\n   -- \ucd08\ub2f9 1\ud68c \uc22b\uc790 \uc99d\uac00 (0~15 \uc21c\ud658)\n   ----------------------------------------------------------------\n   process(clk)\n   begin\n      if rising_edge(clk) then\n         if sec_tick = '1' then\n            if num = 15 then\n               num <= (others => '0');\n            else\n               num <= num + 1;\n            end if;\n         end if;\n      end if;\n   end process;\n\n   ----------------------------------------------------------------\n   -- \uc22b\uc790 \u2192 7\uc138\uadf8 \ubcc0\ud658\n   ----------------------------------------------------------------\n   with num select\n      seg <=\n         (\"100\" & \"0000\") when \"0000\",  -- 0\n         (\"111\" & \"1001\") when \"0001\",  -- 1\n         (\"010\" & \"0100\") when \"0010\",  -- 2\n         (\"011\" & \"0000\") when \"0011\",  -- 3\n         (\"001\" & \"1001\") when \"0100\",  -- 4\n         (\"001\" & \"0010\") when \"0101\",  -- 5\n         (\"000\" & \"0010\") when \"0110\",  -- 6\n         (\"111\" & \"1000\") when \"0111\",  -- 7\n         (\"000\" & \"0000\") when \"1000\",  -- 8\n         (\"001\" & \"0000\") when \"1001\",  -- 9\n         (\"000\" & \"1000\") when \"1010\",  -- A\n         (\"000\" & \"0011\") when \"1011\",  -- b\n         (\"100\" & \"0110\") when \"1100\",  -- C\n         (\"010\" & \"0001\") when \"1101\",  -- d\n         (\"000\" & \"0110\") when \"1110\",  -- E\n         (\"000\" & \"1110\") when \"1111\",  -- F\n         (\"111\" & \"1111\") when others;  -- blank\n\n   ----------------------------------------------------------------\n   -- LED \ucd9c\ub825 (\uae30\uc874 \uadf8\ub300\ub85c \uc720\uc9c0)\n   ----------------------------------------------------------------\n   led_out(7) <= '1';\n   led_out(6) <= '0';\n   led_out(5) <= '0';\n   led_out(4) <= '0';\n   led_out(3) <= '0';\n   led_out(2) <= '0';\n   led_out(1) <= '0';\n   led_out(0) <= '1';\nend architecture;\n\n
"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/7.MODE_SW/","title":"MODE SWITCH","text":"

\uc2ac\ub77c\uc774\ub4dc \uc2a4\uc704\uce58\ub97c \uc774\uc6a9\ud55c \ubaa8\ub4dc \uc124\uc815\uc5d0 \uc0ac\uc6a9\ud55c\ub2e4.

\ud574\ub2f9 \uc2ac\ub77c\uc774\ub4dc\ub97c \uc785\ub825\uc73c\ub85c \uc124\uc815\ud558\uc5ec \uc785\ub825\ub418\ub294 \uac12\ub4e4\uc744 \uc0ac\uc6a9\ud55c\ub2e4.

"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/7.MODE_SW/#pin","title":"PIN \ud14c\uc774\ube14","text":"\ud540 \ubc88\ud638 \uc2e0\ud638 PIN_B3 dout[1] PIN_B4 dout[0] PIN_M2 din[1] PIN_J2 din[0]"},{"location":"%EA%B8%B0%EC%B4%88%EC%8B%A4%EC%8A%B5/7.MODE_SW/#vhdl","title":"VHDL \ucf54\ub4dc","text":"
library ieee;\nuse ieee.std_logic_1164.all;\n\nentity modsw is\n    port (\n        din  : in  std_logic_vector(1 downto 0);  -- 8bit \uc785\ub825\n        dout : out std_logic_vector(1 downto 0)   -- 8bit \ucd9c\ub825\n    );\nend modsw;\n\narchitecture rtl of modsw is\nbegin\n\n    dout <= din;  -- \uc785\ub825\uc744 \uadf8\ub300\ub85c \ucd9c\ub825\n\n\nend rtl;\n\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/1.%EB%A7%88%EC%9D%B4%EC%BB%B4%EC%84%A4%EA%B3%84/","title":"\ub9c8\uc774\ucef4 \uc124\uacc4","text":""},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/1.%EB%A7%88%EC%9D%B4%EC%BB%B4%EC%84%A4%EA%B3%84/#_2","title":"\uc5b4\uc148\ube14\ub9ac \uc5b8\uc5b4","text":"
\nLOAD 10      ; R0 = 5\n\nLOOP:\nLED_ON      ; LED \ucf1c\uae30\nDELAY 1000   ; \ub300\uae30\n\nLED_OFF     ; LED \ub044\uae30\nDELAY 1000   ; \ub300\uae30\n\nDEC         ; R0 = R0 - 1\n\nJNZ LOOP    ; R0 != 0\uc774\uba74 LOOP\ub85c \uc774\ub3d9\n\nJZ END_ON   ; R0 == 0\uc774\uba74 END_ON\uc73c\ub85c \uc774\ub3d9\n\nEND_ON:\nLED_ON      ; LED \ucf20 \uc0c1\ud0dc \uc720\uc9c0\nJMP END_ON  ; \ubb34\ud55c \ubc18\ubcf5\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/1.%EB%A7%88%EC%9D%B4%EC%BB%B4%EC%84%A4%EA%B3%84/#cpu","title":"CPU \uad6c\uc131","text":"

CPU \ub0b4\ubd80\uc758 \uad6c\uc131\uc740 \ub2e4\uc74c\uacfc \uac19\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/1.%EB%A7%88%EC%9D%B4%EC%BB%B4%EC%84%A4%EA%B3%84/#_3","title":"\uba85\ub839\uc5b4","text":"

0x1 LOAD n 0x2 INC 0x3 DEC 0x4 JMP addr 0x5 JZ addr 0x6 JNZ addr 0x7 LED_ON 0x8 LED_OFF 0x9 DELAY n

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/1.%EB%A7%88%EC%9D%B4%EC%BB%B4%EC%84%A4%EA%B3%84/#_4","title":"\ucef4\ud30c\uc77c\ub7ec","text":"

\uc5b4\uc149\ube14\ub9ac\ub85c \uc791\uc131\ub41c \ud504\ub85c\uadf8\ub7a8\uc744 \uba85\ub839\uc5b4 \ucf54\ub4dc\ub85c \ubcc0\ud658\ub41c \uae30\uacc4\uc5b4 \uc5b8\uc5b4\ub85c \ubcc0\ud658\ud574\uc8fc\ub294 \ud504\ub85c\uadf8\ub7a8

\npython asmtohex.py led.asm \n\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/1.%EB%A7%88%EC%9D%B4%EC%BB%B4%EC%84%A4%EA%B3%84/#_5","title":"\ud504\ub85c\uadf8\ub7a8 \ub2e4\uc6b4\ub85c\ub4dc","text":"

\uc2dc\ub9ac\uc5bc\uc744 \ud1b5\ud574\uc11c \uae30\uacc4\uc5b4 hex \ud30c\uc77c\ub85c \ubcc0\ud658\ub41c \ud504\ub85c\uadf8\ub7a8\uc744 \ub2e4\uc6b4\ub85c\ub4dc \ud55c\ub2e4.

python hexsend.py led.hex\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/2.cmd_set/","title":"\uba85\ub839\uc5b4 \ub9cc\ub4e4\uae30","text":"

TINY CPU MICOM\uc744 \uc774\uc6a9\ud55c LED \ub97c \uc81c\uc5b4\uc5d0 \ud544\uc694\ud55c \uba85\ub839\uc5b4 SET \uad6c\uc131\uc744 \ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/2.cmd_set/#led","title":"LED \ucf1c\ub294 \uba85\ub839\uc5b4","text":"

LED\ub97c \uc81c\uc5b4\ud558\ub294\ub370 \ud544\uc694\ud55c \uc5b4\uc148\ube14\ub9ac \uc5b8\uc5b4\uc5d0 \ud544\uc694\ud55c \uba85\ub839\uc5b4\ub4e4\uc5b4 16bit \ub2e8\uc704\ub85c \ub3d9\uc791\ud558\ub3c4\ub85d \uc791\uc131\ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/2.cmd_set/#_2","title":"\uba85\ub839\uc5b4 \ud3ec\ub9f7","text":"
16bit = opcode[15:12] + operand[11:0]\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/2.cmd_set/#_3","title":"\uba85\ub839\uc5b4","text":"Mnemonic Operand Opcode (Hex) Description NOP - 0x0 No Operation LOAD n 0x1 Load immediate value into register INC - 0x2 Increment register DEC - 0x3 Decrement register JMP addr 0x4 Unconditional jump JZ addr 0x5 Jump if zero JNZ addr 0x6 Jump if not zero LED_ON - 0x7 Turn LED on LED_OFF - 0x8 Turn LED off DELAY n 0x9 Delay for n time units

\ub9cc\uc57d 16\ube44\ud2b8 \uba85\ub839\uc5b4 \ud615\uc2dd(\uc0c1\uc704 4\ube44\ud2b8 Opcode, \ud558\uc704 12\ube44\ud2b8 Operand)\uc744 \uc0ac\uc6a9\ud55c\ub2e4\uba74 \ub2e4\uc74c\uacfc \uac19\uc774 \uc815\ub9ac\ud560 \uc218\ub3c4 \uc788\uc2b5\ub2c8\ub2e4.

Opcode Mnemonic Format Example 0x0 NOP NOP 0x0000 0x1 LOAD LOAD n 0x100A 0x2 INC INC 0x2000 0x3 DEC DEC 0x3000 0x4 JMP JMP addr 0x4005 0x5 JZ JZ addr 0x500A 0x6 JNZ JNZ addr 0x6002 0x7 LED_ON LED_ON 0x7000 0x8 LED_OFF LED_OFF 0x8000 0x9 DELAY DELAY n 0x93E8"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/3.%EC%96%B4%EC%85%88%EB%B8%94%EB%9F%AC%EC%9E%91%EC%84%B1/","title":"\uc5b4\uc148\ube14\ub7ec\uc791\uc131","text":""},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/3.%EC%96%B4%EC%85%88%EB%B8%94%EB%9F%AC%EC%9E%91%EC%84%B1/#led","title":"LED \ud504\ub85c\uadf8\ub7a8\uc791\uc131","text":"

LED \ub97c \uc81c\uc5b4\ud558\ub294 \ub370 \ud544\uc694\ud55c \uba85\ub839\uc5b4\ub97c \uad6c\uc131\uc744 \ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/3.%EC%96%B4%EC%85%88%EB%B8%94%EB%9F%AC%EC%9E%91%EC%84%B1/#c","title":"C \uc5b8\uc5b4 \ud45c\ud604","text":"

C \uc5b8\uc5b4\ub85c \uc791\uc131\ub41c \ud504\ub85c\uadf8\ub7a8\uc740 \ub2e4\uc74c\uacfc \uac19\uc774 \ub3d9\uc791\ud558\ub294 \ud504\ub85c\uadf8\ub7a8

\n#include <stdint.h>\n\nvoid LED_ON(void);\nvoid LED_OFF(void);\nvoid DELAY(uint32_t ms);\n\nint main(void)\n{\n    int R0;\n\n    R0 = 10;\n\nLOOP:\n    LED_ON();\n    DELAY(1000);\n\n    LED_OFF();\n    DELAY(1000);\n\n    R0--;\n\n    if (R0 != 0)\n        goto LOOP;\n\nEND_ON:\n    LED_ON();\n\n    while (1)\n    {\n        // JMP END_ON\n    }\n\n    return 0;\n}\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/3.%EC%96%B4%EC%85%88%EB%B8%94%EB%9F%AC%EC%9E%91%EC%84%B1/#asm","title":"ASM \uc5b8\uc5b4 \ud45c\ud604","text":" 
\nLOAD 10      ; R0 = 5\n\nLOOP:\nLED_ON      ; LED \ucf1c\uae30\nDELAY 1000   ; \ub300\uae30\n\nLED_OFF     ; LED \ub044\uae30\nDELAY 1000   ; \ub300\uae30\n\nDEC         ; R0 = R0 - 1\n\nJNZ LOOP    ; R0 != 0\uc774\uba74 LOOP\ub85c \uc774\ub3d9\n\nJZ END_ON   ; R0 == 0\uc774\uba74 END_ON\uc73c\ub85c \uc774\ub3d9\n\nEND_ON:\nLED_ON      ; LED \ucf20 \uc0c1\ud0dc \uc720\uc9c0\nJMP END_ON  ; \ubb34\ud55c \ubc18\ubcf5\n\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/4.%EC%BB%B4%ED%8C%8C%EC%9D%BC%EB%9F%AC%EC%9E%91%EC%84%B1/","title":"\ucef4\ud30c\uc77c\ub7ec\uc791\uc131","text":"

\uc5b4\uc148\ube14\ub9ac \uc5b8\uc5b4\ub97c \uae30\uacc4\uc5b4 hex \ud30c\uc77c\ub85c \ubcc0\ud658\ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/4.%EC%BB%B4%ED%8C%8C%EC%9D%BC%EB%9F%AC%EC%9E%91%EC%84%B1/#_2","title":"\ubcc0\ud658 \ud504\ub85c\uadf8\ub7a8 \uad6c\ub3d9","text":"
python asmtohex.py led.asm \n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/4.%EC%BB%B4%ED%8C%8C%EC%9D%BC%EB%9F%AC%EC%9E%91%EC%84%B1/#_3","title":"\ubcc0\ud658\ud504\ub85c\uadf8\ub7a8","text":"

asmtohex.py \ud30c\uc77c \uc774\ub984\uc73c\ub85c \ub2e4\uc74c\uacfc \ud30c\uc774\uc36c \uc5b8\uc5b4\ub85c \uc791\uc131\ud55c\ub2e4.

\nimport sys\nfrom pathlib import Path\n\nOPCODE = {\n    \"NOP\":     0x0,\n    \"LOAD\":    0x1,\n    \"INC\":     0x2,\n    \"DEC\":     0x3,\n    \"JMP\":     0x4,\n    \"JZ\":      0x5,\n    \"JNZ\":     0x6,\n    \"LED_ON\":  0x7,\n    \"LED_OFF\": 0x8,\n    \"DELAY\":   0x9,\n}\n\ndef remove_comment(line):\n    return line.split(\";\")[0].strip()\n\ndef parse_number(text):\n    text = text.strip()\n    if text.lower().startswith(\"0x\"):\n        return int(text, 16)\n    if text.lower().startswith(\"0b\"):\n        return int(text, 2)\n    return int(text, 10)\n\ndef assemble(asm_text):\n    labels = {}\n    instructions = []\n    pc = 0\n\n    # 1\ucc28 \ud328\uc2a4: \ub77c\ubca8 \uc8fc\uc18c \uc218\uc9d1\n    for raw_line in asm_text.splitlines():\n        line = remove_comment(raw_line)\n\n        if not line:\n            continue\n\n        if line.endswith(\":\"):\n            label = line[:-1].strip()\n            if label in labels:\n                raise ValueError(f\"\uc911\ubcf5 \ub77c\ubca8: {label}\")\n            labels[label] = pc\n            continue\n\n        if \":\" in line:\n            label_part, inst_part = line.split(\":\", 1)\n            label = label_part.strip()\n            inst_line = inst_part.strip()\n\n            if label in labels:\n                raise ValueError(f\"\uc911\ubcf5 \ub77c\ubca8: {label}\")\n\n            labels[label] = pc\n\n            if inst_line:\n                instructions.append(inst_line)\n                pc += 1\n\n            continue\n\n        instructions.append(line)\n        pc += 1\n\n    machine = []\n\n    # 2\ucc28 \ud328\uc2a4: \uba85\ub839\uc5b4 \ubcc0\ud658\n    for addr, line in enumerate(instructions):\n        parts = line.replace(\",\", \" \").split()\n\n        if not parts:\n            continue\n\n        mnemonic = parts[0].upper()\n\n        if mnemonic not in OPCODE:\n            raise ValueError(f\"{addr}: \uc54c \uc218 \uc5c6\ub294 \uba85\ub839\uc5b4: {mnemonic}\")\n\n        opcode = OPCODE[mnemonic]\n        operand = 0\n\n        if len(parts) >= 2:\n            arg = parts[1]\n            if arg in labels:\n                operand = labels[arg]\n            else:\n                operand = parse_number(arg)\n\n        if operand < 0 or operand > 0x0FFF:\n            raise ValueError(f\"{addr}: operand \ubc94\uc704 \ucd08\uacfc 0~4095: {operand}\")\n\n        word = (opcode << 12) | (operand & 0x0FFF)\n        machine.append(word)\n\n    return machine, labels, instructions\n\ndef main():\n    if len(sys.argv) != 2:\n        print(\"\uc0ac\uc6a9\ubc95: python asmtohex.py led.asm\")\n        sys.exit(1)\n\n    asm_path = Path(sys.argv[1])\n\n    if not asm_path.exists():\n        print(f\"\ud30c\uc77c \uc5c6\uc74c: {asm_path}\")\n        sys.exit(1)\n\n    hex_path = asm_path.with_suffix(\".hex\")\n    asm_text = asm_path.read_text(encoding=\"utf-8\")\n\n    machine, labels, instructions = assemble(asm_text)\n\n    with hex_path.open(\"w\", encoding=\"utf-8\") as f:\n        for word in machine:\n            f.write(f\"{word:04X}\\n\")\n\n    print(\"\ub77c\ubca8:\")\n    for name, addr in labels.items():\n        print(f\"  {name} = {addr}\")\n\n    print()\n    print(\"\uae30\uacc4\uc5b4:\")\n    for addr, word in enumerate(machine):\n        print(f\"  {addr:02d}: {word:04X}    ; {instructions[addr]}\")\n\n    print()\n    print(f\"HEX \uc0dd\uc131 \uc644\ub8cc: {hex_path}\")\n\nif __name__ == \"__main__\":\n    main()\n\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/5.%EB%8B%A4%EC%9A%B4%EB%A1%9C%EB%8D%94%EC%9E%91%EC%84%B1/","title":"\ub2e4\uc6b4\ub85c\ub354 \uc791\uc131","text":"

\uae30\uacc4\uc5b4 hex \ud30c\uc77c\ub85c FPGA \ucf54\uc5b4\ub85c \uc804\uc1a1\ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/5.%EB%8B%A4%EC%9A%B4%EB%A1%9C%EB%8D%94%EC%9E%91%EC%84%B1/#_2","title":"\ubcc0\ud658 \ud504\ub85c\uadf8\ub7a8 \uad6c\ub3d9","text":"
python hexsend.py led.hex\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/5.%EB%8B%A4%EC%9A%B4%EB%A1%9C%EB%8D%94%EC%9E%91%EC%84%B1/#_3","title":"\ubcc0\ud658\ud504\ub85c\uadf8\ub7a8","text":"

hexsend.py \ud30c\uc77c \uc774\ub984\uc73c\ub85c \ub2e4\uc74c\uacfc \ud30c\uc774\uc36c \uc5b8\uc5b4\ub85c \uc791\uc131\ud55c\ub2e4.

hexsend.py \ub2e4\uc6b4\ub85c\ub4dc

import sys\nimport time\nfrom pathlib import Path\n\ntry:\n    import serial\nexcept ImportError:\n    print(\"pyserial\uc774 \ud544\uc694\ud569\ub2c8\ub2e4.\")\n    print(\"\uc124\uce58: pip install pyserial\")\n    sys.exit(1)\n\nPORT = \"COM3\"\nBAUD = 115200\n\ndef read_hex_file(hex_path):\n    data = bytearray()\n\n    for line_no, raw_line in enumerate(hex_path.read_text(encoding=\"utf-8\").splitlines(), start=1):\n        line = raw_line.split(\";\")[0].strip()\n\n        if not line:\n            continue\n\n        line = line.replace(\"0x\", \"\").replace(\"0X\", \"\")\n\n        if len(line) != 4:\n            raise ValueError(f\"{line_no}\ubc88\uc9f8 \uc904 \uc624\ub958: 16\ube44\ud2b8 HEX 4\uc790\ub9ac\uc5ec\uc57c \ud568: {raw_line}\")\n\n        word = int(line, 16)\n\n        high = (word >> 8) & 0xFF\n        low  = word & 0xFF\n\n        data.append(high)\n        data.append(low)\n\n    return data\n\ndef main():\n    if len(sys.argv) != 2:\n        print(\"\uc0ac\uc6a9\ubc95: python hexsend.py led.hex\")\n        sys.exit(1)\n\n    hex_path = Path(sys.argv[1])\n\n    if not hex_path.exists():\n        print(f\"\ud30c\uc77c \uc5c6\uc74c: {hex_path}\")\n        sys.exit(1)\n\n    send_data = read_hex_file(hex_path)\n\n    send_data.append(0xFF)\n    send_data.append(0xFF)\n\n    print(f\"\ud30c\uc77c: {hex_path}\")\n    print(f\"\uc804\uc1a1 \ubc14\uc774\ud2b8 \uc218: {len(send_data)}\")\n    print(\"\uc804\uc1a1 \ub370\uc774\ud130:\")\n    print(send_data.hex(\" \").upper())\n\n    ser = serial.Serial(\n        port=PORT,\n        baudrate=BAUD,\n        bytesize=serial.EIGHTBITS,\n        parity=serial.PARITY_NONE,\n        stopbits=serial.STOPBITS_ONE,\n        timeout=1\n    )\n\n    time.sleep(2)\n\n    ser.reset_input_buffer()\n    ser.reset_output_buffer()\n\n    ser.write(send_data)\n    ser.flush()\n    ser.close()\n\n    print()\n    print(f\"{PORT}, {BAUD}bps \uc804\uc1a1 \uc644\ub8cc\")\n\nif __name__ == \"__main__\":\n    main()\n\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/6.FPGA%EC%A0%9C%EC%9E%91/","title":"FPGA\uc81c\uc791","text":"

\uc5b4\uc148\ube14\ub9ac\uc5d0\uc11c hex \uae30\uacc4\uc5b4\ub85c \ubcc0\ud658\ub41c \ucf54\ub4dc\ub97c \uc2dc\ub9ac\uc5bc\ub85c \ubd80\ud130 \ubc1b\uc544\uc11c, \uad6c\ub3d9\ud558\ub294 \ud504\ub85c\uadf8\ub7a8\uc744 VHDL\ub85c \uc791\uc131\uc744 \ud55c\ub2e4.

\uc9c0\uae08\uae4c\uc9c0 \ub9cc\ub4e0 CPU\ub97c \uc774\uc6a9\ud55c\ub2e4\uba74 \uad6c\uc870\ub294 \ub2e4\uc74c\uacfc \uac19\uc2b5\ub2c8\ub2e4. hex 1\ucc28 \ub2e4\uc6b4\ub85c\ub4dc \u2192 FF FF \u2192 \uc790\ub3d9 \uc2e4\ud589 \uc2e4\ud589 \uc911 \uc0c8 hexsend.py \uc804\uc1a1 \u2192 \uccab \ubc14\uc774\ud2b8 \uc218\uc2e0 \uc21c\uac04 CPU \uc815\uc9c0 \u2192 RAM \uc8fc\uc18c 0\ubd80\ud130 \ub2e4\uc2dc \uc800\uc7a5 \u2192 FF FF \uc218\uc2e0 \u2192 \uc0c8 \ud504\ub85c\uadf8\ub7a8 \uc790\ub3d9 \uc2e4\ud589

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/6.FPGA%EC%A0%9C%EC%9E%91/#_1","title":"\ub3d9\uc791\uacfc\uc815 \uc124\uba85","text":""},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/6.FPGA%EC%A0%9C%EC%9E%91/#cpu","title":"CPU \uad6c\uc131 \ube14\ub85d \uc124\uba85","text":"\uad6c\uc131\uc694\uc18c \uc5ed\ud560 \uc800\uc7a5 \ub370\uc774\ud130 \uc8fc\uc694 \ub3d9\uc791 PC (Program Counter) \ud604\uc7ac \uc2e4\ud589\ud560 \uba85\ub839\uc5b4 \uc8fc\uc18c \uc800\uc7a5 \uba85\ub839\uc5b4 \uc8fc\uc18c \ub2e4\uc74c \uba85\ub839\uc5b4 \uc704\uce58 \uad00\ub9ac Program RAM \ud504\ub85c\uadf8\ub7a8 \uc800\uc7a5 \uae30\uacc4\uc5b4(16\ube44\ud2b8 \uba85\ub839\uc5b4) UART\ub85c \ub2e4\uc6b4\ub85c\ub4dc\ub41c \ud504\ub85c\uadf8\ub7a8 \uc800\uc7a5 Instruction Decoder \uba85\ub839\uc5b4 \ud574\uc11d Opcode, Operand \uba85\ub839\uc5b4 \uc885\ub958 \ud310\ubcc4 R0 Register \ubc94\uc6a9 \ub808\uc9c0\uc2a4\ud130 \uc5f0\uc0b0 \ub370\uc774\ud130 LOAD, INC, DEC \uc218\ud589 Delay Block \uc2dc\uac04 \uc9c0\uc5f0 Delay Counter \uc9c0\uc815 \uc2dc\uac04 \ub3d9\uc548 \ub300\uae30 GPIO \uc678\ubd80 \ud540 \uc81c\uc5b4 LED \uc0c1\ud0dc LED ON/OFF UART RX \ud504\ub85c\uadf8\ub7a8 \ub2e4\uc6b4\ub85c\ub4dc \uc218\uc2e0 \ub370\uc774\ud130 PC\ub85c\ubd80\ud130 \ud504\ub85c\uadf8\ub7a8 \uc218\uc2e0 Boot Loader \ud504\ub85c\uadf8\ub7a8 \uc801\uc7ac \uc81c\uc5b4 RAM \uc8fc\uc18c RAM \uc800\uc7a5 \ubc0f \uc2e4\ud589 \uc2dc\uc791

\uc989 \ud604\uc7ac \uc124\uacc4\ub294 UART Bootloader + Program RAM + Tiny CPU \uad6c\uc870\ub85c, Quartus \uc7ac\ud569\uc131 \uc5c6\uc774 ASM \u2192 HEX \u2192 UART \ub2e4\uc6b4\ub85c\ub4dc \u2192 \uc989\uc2dc \uc2e4\ud589\uc774 \uac00\ub2a5\ud55c \uac04\ub2e8\ud55c MCU \ud615\ud0dc\uc785\ub2c8\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/6.FPGA%EC%A0%9C%EC%9E%91/#_2","title":"\ub3d9\uc791 \uc2dc\ub098\ub9ac\uc624","text":"
\n               \uc804\uc6d0\uc778\uac00\n                    \u2502\n                    \u25bc\n         CPU_LOAD_PROGRAM\n                    \u2502\n         UART \ud504\ub85c\uadf8\ub7a8 \uc218\uc2e0\n                    \u2502\n            FF FF \uc218\uc2e0\n                    \u2502\n                    \u25bc\n              CPU_FETCH\n                    \u2502\n                    \u25bc\n             CPU_DECODE\n                    \u2502\n                    \u25bc\n              CPU_DELAY\n                    \u2502\n                    \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510\n                            \u2502\n                            \u25bc\n                       CPU_FETCH\n\n\n\uc2e4\ud589 \uc911 UART \ub370\uc774\ud130 \uc218\uc2e0\n            \u2502\n            \u25bc\n      CPU_LOAD_PROGRAM\n            \u2502\n      \uc0c8 \ud504\ub85c\uadf8\ub7a8 \uc218\uc2e0\n            \u2502\n         FF FF\n            \u2502\n            \u25bc\n        \uc0c8 \ud504\ub85c\uadf8\ub7a8 \uc2e4\ud589\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/6.FPGA%EC%A0%9C%EC%9E%91/#_3","title":"\ud540\ud14c\uc774\ube14","text":"

\uc544\ub798\uc640 \uac19\uc774, VHDL\uc5d0 \uc0ac\uc6a9\ub418\ub294 \ud540\uc744 \ub300\ud55c \ud560\ub2f9\uc744 \ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/6.FPGA%EC%A0%9C%EC%9E%91/#vhdl-code","title":"VHDL CODE","text":"

micom.vhdl \ub2e4\uc6b4\ub85c\ub4dc

library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity micom is\n    port (\n        clk     : in  std_logic;  -- 50MHz\n        reset   : in  std_logic;  -- High reset\n        uart_rx : in  std_logic;\n        led     : out std_logic\n    );\nend entity;\n\narchitecture rtl of micom is\n\n    constant CLK_FREQ  : integer := 50000000;\n    constant BAUD_RATE : integer := 115200;\n    constant BAUD_CNT  : integer := CLK_FREQ / BAUD_RATE;\n\n    type ram_type is array (0 to 255) of std_logic_vector(15 downto 0);\n    signal prog_ram : ram_type := (others => x\"0000\");\n\n    type uart_state_type is (\n        UART_IDLE,\n        UART_START,\n        UART_DATA,\n        UART_STOP\n    );\n\n    signal uart_state   : uart_state_type := UART_IDLE;\n    signal baud_counter : integer range 0 to BAUD_CNT := 0;\n    signal bit_index    : integer range 0 to 7 := 0;\n\n    signal rx_shift : std_logic_vector(7 downto 0) := (others => '0');\n    signal rx_byte  : std_logic_vector(7 downto 0) := (others => '0');\n    signal rx_valid : std_logic := '0';\n\n    signal byte_high : std_logic_vector(7 downto 0) := (others => '0');\n    signal rx_phase  : std_logic := '0';\n\n    signal wr_addr : integer range 0 to 255 := 0;\n    signal cpu_run : std_logic := '0';\n\n    type cpu_state_type is (\n        CPU_LOAD_PROGRAM,\n        CPU_FETCH,\n        CPU_DECODE,\n        CPU_DELAY\n    );\n\n    signal cpu_state : cpu_state_type := CPU_LOAD_PROGRAM;\n\n    signal pc    : integer range 0 to 255 := 0;\n    signal inst  : std_logic_vector(15 downto 0) := x\"0000\";\n\n    signal opcode  : std_logic_vector(3 downto 0);\n    signal operand : unsigned(11 downto 0);\n\n    signal r0    : unsigned(15 downto 0) := (others => '0');\n    signal zflag : std_logic := '0';\n\n    signal delay_counter : unsigned(31 downto 0) := (others => '0');\n\nbegin\n\n    opcode  <= inst(15 downto 12);\n    operand <= unsigned(inst(11 downto 0));\n\n    --------------------------------------------------------------------\n    -- UART RX\n    --------------------------------------------------------------------\n    process(clk, reset)\n    begin\n        if reset = '1' then\n            uart_state   <= UART_IDLE;\n            baud_counter <= 0;\n            bit_index    <= 0;\n            rx_shift     <= (others => '0');\n            rx_byte      <= (others => '0');\n            rx_valid     <= '0';\n\n        elsif rising_edge(clk) then\n            rx_valid <= '0';\n\n            case uart_state is\n\n                when UART_IDLE =>\n                    if uart_rx = '0' then\n                        baud_counter <= BAUD_CNT / 2;\n                        uart_state <= UART_START;\n                    end if;\n\n                when UART_START =>\n                    if baud_counter = 0 then\n                        if uart_rx = '0' then\n                            baud_counter <= BAUD_CNT - 1;\n                            bit_index <= 0;\n                            uart_state <= UART_DATA;\n                        else\n                            uart_state <= UART_IDLE;\n                        end if;\n                    else\n                        baud_counter <= baud_counter - 1;\n                    end if;\n\n                when UART_DATA =>\n                    if baud_counter = 0 then\n                        rx_shift(bit_index) <= uart_rx;\n                        baud_counter <= BAUD_CNT - 1;\n\n                        if bit_index = 7 then\n                            uart_state <= UART_STOP;\n                        else\n                            bit_index <= bit_index + 1;\n                        end if;\n                    else\n                        baud_counter <= baud_counter - 1;\n                    end if;\n\n                when UART_STOP =>\n                    if baud_counter = 0 then\n                        rx_byte  <= rx_shift;\n                        rx_valid <= '1';\n                        uart_state <= UART_IDLE;\n                    else\n                        baud_counter <= baud_counter - 1;\n                    end if;\n\n            end case;\n        end if;\n    end process;\n\n    --------------------------------------------------------------------\n    -- Loader\n    -- \uc2e4\ud589 \uc911 \uc0c8 UART \ub370\uc774\ud130\uac00 \ub4e4\uc5b4\uc624\uba74 \uc790\ub3d9 \ucd08\uae30\ud654 \ud6c4 \uc7ac\ub2e4\uc6b4\ub85c\ub4dc\n    --------------------------------------------------------------------\n    process(clk, reset)\n        variable word_data : std_logic_vector(15 downto 0);\n    begin\n        if reset = '1' then\n            byte_high <= (others => '0');\n            rx_phase  <= '0';\n            wr_addr   <= 0;\n            cpu_run   <= '0';\n\n        elsif rising_edge(clk) then\n\n            if rx_valid = '1' then\n\n                -- CPU \uc2e4\ud589 \uc911 \uc0c8 \ub370\uc774\ud130\uac00 \ub4e4\uc5b4\uc624\uba74 \uae30\uc874 \uc2e4\ud589 \uc911\uc9c0 \ud6c4 \uc7ac\ub2e4\uc6b4\ub85c\ub4dc \uc2dc\uc791\n                if cpu_state /= CPU_LOAD_PROGRAM then\n                    wr_addr   <= 0;\n                    rx_phase  <= '0';\n                    cpu_run   <= '0';\n                    byte_high <= rx_byte;\n                    rx_phase  <= '1';\n\n                else\n                    if rx_phase = '0' then\n                        byte_high <= rx_byte;\n                        rx_phase <= '1';\n\n                    else\n                        word_data := byte_high & rx_byte;\n\n                        if word_data = x\"FFFF\" then\n                            cpu_run  <= '1';\n                            rx_phase <= '0';\n\n                        else\n                            prog_ram(wr_addr) <= word_data;\n\n                            if wr_addr < 255 then\n                                wr_addr <= wr_addr + 1;\n                            end if;\n\n                            rx_phase <= '0';\n                        end if;\n                    end if;\n                end if;\n            end if;\n        end if;\n    end process;\n\n    --------------------------------------------------------------------\n    -- CPU\n    --------------------------------------------------------------------\n    process(clk, reset)\n    begin\n        if reset = '1' then\n            cpu_state <= CPU_LOAD_PROGRAM;\n            pc <= 0;\n            inst <= x\"0000\";\n            r0 <= (others => '0');\n            zflag <= '0';\n            delay_counter <= (others => '0');\n            led <= '0';\n\n        elsif rising_edge(clk) then\n\n            -- \uc2e4\ud589 \uc911 UART \ub370\uc774\ud130\uac00 \ub4e4\uc5b4\uc624\uba74 CPU\ub97c \ucd08\uae30\ud654\ud558\uace0 \ub2e4\uc6b4\ub85c\ub4dc \ubaa8\ub4dc\ub85c \uc804\ud658\n            if rx_valid = '1' and cpu_state /= CPU_LOAD_PROGRAM then\n                cpu_state <= CPU_LOAD_PROGRAM;\n                pc <= 0;\n                inst <= x\"0000\";\n                r0 <= (others => '0');\n                zflag <= '0';\n                delay_counter <= (others => '0');\n                led <= '0';\n\n            else\n                case cpu_state is\n\n                    when CPU_LOAD_PROGRAM =>\n                        if cpu_run = '1' then\n                            pc <= 0;\n                            cpu_state <= CPU_FETCH;\n                        end if;\n\n                    when CPU_FETCH =>\n                        inst <= prog_ram(pc);\n\n                        if pc < 255 then\n                            pc <= pc + 1;\n                        end if;\n\n                        cpu_state <= CPU_DECODE;\n\n                    when CPU_DECODE =>\n                        case opcode is\n\n                            when x\"0\" =>\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"1\" =>\n                                r0 <= resize(operand, 16);\n\n                                if operand = 0 then\n                                    zflag <= '1';\n                                else\n                                    zflag <= '0';\n                                end if;\n\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"2\" =>\n                                r0 <= r0 + 1;\n\n                                if r0 + 1 = 0 then\n                                    zflag <= '1';\n                                else\n                                    zflag <= '0';\n                                end if;\n\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"3\" =>\n                                r0 <= r0 - 1;\n\n                                if r0 - 1 = 0 then\n                                    zflag <= '1';\n                                else\n                                    zflag <= '0';\n                                end if;\n\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"4\" =>\n                                pc <= to_integer(operand(7 downto 0));\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"5\" =>\n                                if zflag = '1' then\n                                    pc <= to_integer(operand(7 downto 0));\n                                end if;\n\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"6\" =>\n                                if zflag = '0' then\n                                    pc <= to_integer(operand(7 downto 0));\n                                end if;\n\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"7\" =>\n                                led <= '1';\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"8\" =>\n                                led <= '0';\n                                cpu_state <= CPU_FETCH;\n\n                            when x\"9\" =>\n                                delay_counter <= to_unsigned(to_integer(operand) * 50000, 32);\n                                cpu_state <= CPU_DELAY;\n\n                            when others =>\n                                cpu_state <= CPU_FETCH;\n\n                        end case;\n\n                    when CPU_DELAY =>\n                        if delay_counter = 0 then\n                            cpu_state <= CPU_FETCH;\n                        else\n                            delay_counter <= delay_counter - 1;\n                        end if;\n\n                end case;\n            end if;\n        end if;\n    end process;\n\nend architecture;\n
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/7.%ED%94%84%EB%A1%9C%EA%B7%B8%EB%9E%A8%EC%8B%A4%EC%8A%B5/","title":"\ud504\ub85c\uadf8\ub7a8 \uc2e4\uc2b5","text":"
  1. \uc5b4\uc148\ube14\ub9ac \uc5b8\uc5b4\ub85c \ud504\ub85c\uadf8\ub7a8\uc744 \uc791\uc131\ud558\uace0
  2. \ucef4\ud30c\uc77c \ud558\uace0
  3. hex \ud30c\uc77c\uc744 \ub2e4\uc6b4\ub85c\ub4dc
  4. FPGA \uc2e4\uc2b5\ud0a4\ud2b8\uc5d0\uc11c \ub3d9\uc791\uc744 \ud655\uc778\ud55c\ub2e4.
  5. VHDL\uc744 \ub9e4\ubc88 \uc218\uc815,\ucef4\ud30c\uc77c,\ub2e4\uc6b4\ub85c\ub4dc\ud558\uc9c0 \uc54a\uc544\ub3c4, \ud504\ub85c\uadf8\ub7a8 \ucf54\ub4dc\ub97c \ubcc0\uacbd\ud558\uc5ec \uc6d0\ud558\ub294\ub3d9\uc791\uc744 \ubc14\ub85c \uc2e4\ud589\ud560 \uc218 \uc788\ub2e4.
"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/7.%ED%94%84%EB%A1%9C%EA%B7%B8%EB%9E%A8%EC%8B%A4%EC%8A%B5/#_2","title":"\ud504\ub85c\uadf8\ub7a8 \uc791\uc131","text":"

R0 \uc758 \uac12\uc744 \ubcc0\uacbd\ud558\uac70\ub098, DELAY \uc758 \uac12\uc744 \ubcc0\uacbd\ud558\uc5ec \ud504\ub85c\uadf8\ub7a8\uc744 \uc218\uc815\ud55c\ub2e4. R0 \ub294 LED\uac00 \uae5c\ube61\uc774\ub294 \ud69f\uc218\ub97c \uc124\uc815\ud558\ub294 \uac83\uc774\uba70, DELAY \uc5d0 \uc124\uc815\ub418\ub294 \uac12\uc740 ms\uc758 \uac12\uc73c\ub85c \uc9c0\uc5f0\uac12\uc744 \ub098\ud0c0\ub0b8\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/7.%ED%94%84%EB%A1%9C%EA%B7%B8%EB%9E%A8%EC%8B%A4%EC%8A%B5/#_3","title":"\ud504\ub85c\uadf8\ub7a8 \ucef4\ud30c\uc77c","text":"
python asmtohex.py led.asm \n

led.hex \ud30c\uc77c\uc744 \ucd9c\ub825\ud55c\ub2e4.

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/7.%ED%94%84%EB%A1%9C%EA%B7%B8%EB%9E%A8%EC%8B%A4%EC%8A%B5/#_4","title":"\ud504\ub85c\uadf8\ub7a8 \uc804\uc1a1","text":"

hexsend.py \uc744 \uc774\uc6a9\ud574\uc11c \ud504\ub85c\uadf8\ub7a8\uc744 FPGA \ub85c \ub3d9\uc791\ucf54\ub4dc\ub97c \uc804\uc1a1\ud55c\ub2e4.

python hexsend.py led.hex \n

"},{"location":"%EC%86%8C%ED%98%95%EB%A7%88%EC%9D%B4%EC%BB%B4/7.%ED%94%84%EB%A1%9C%EA%B7%B8%EB%9E%A8%EC%8B%A4%EC%8A%B5/#_5","title":"\ub3d9\uc791\uc0c1\ud0dc \ud655\uc778","text":"

\ud504\ub85c\uadf8\ub7a8\uc744 \uc218\uc815\ud558\uc5ec \ucef4\ud30c\uc77c \ud558\uc5ec \uc804\uc1a1\ud558\ubbc0\ub85c\uc368, \uc18d\ub3c4, \ud69f\uc218\ub97c \uc790\uc720\ub86d\uac8c \ubcc0\uacbd\ud558\uc5ec \ud504\ub85c\uadf8\ub7a8 \uc801\uc6a9\ud558\uc5ec \uad6c\ub3d9\ud560 \uc218 \uc788\ub2e4.

\ud504\ub85c\uadf8\ub7a8\uc744 \ub2e4\uc6b4\ub85c\ub4dc \ud558\uc5ec \uc989\uc2dc \ubc18\uc601\ub41c \ub3d9\uc791\uc744 \ud655\uc778\ud55c\ub2e4.

"}]}